This invention relates to a high gain amplifier which drives a load substantially from rail to rail and to a frequency compensator circuit for this and other amplifiers.
In certain types of high gain amplifiers such as disclosed in U.S. Pat. No. 4,857,862 (incorporated by reference herein in its entirety) by the same inventor it is not possible to drive the output from rail to rail. The phrase xe2x80x9crail to railxe2x80x9d as used herein generally means that the voltage is able to swing between the negative power supply and positive power supply. However, it being understood that this is an approximation as the signal does not swing completely to the negative and positive supply voltages but rather can only closely approach them. These amplifiers typically have a differential amplifier input stage including a pair of common emitter connected transistors and the output voltage cannot be drawn below the common emitter voltage. The solution to the problem provided by this invention introduces an additional problem with respect to frequency compensation which is solved by a further feature of the invention.
It is therefore an object of this invention to provide an improved high gain amplifier that has even higher gain.
It is a further object of this invention to provide such a high gain amplifier which is capable of virtually rail to rail output.
It is a further object of this invention to provide such a high gain amplifier which is simple to frequency compensate.
The invention results from the realization that an even higher gain, rail to rail amplifier can be achieved by adding a second common emitter output stage which is a gain stage that allows the output to swing widely with respect to its input signal and the further realization that since the second stage is an inverting stage a single capacitive circuit can be interconnected between the output of the second common emitter stage and the input of the first common emitter stage to frequency compensate the whole amplifier.
This invention features a high gain amplifier including a differential amplifier stage having a pair of transistors and first and second input circuits for providing input signals to the pair of transistors. There are transistor means arranged as a differential-to-single-ended converter driven by the differential amplifier stage to provide a single-ended output signal. An intermediate gain stage has an input responsive to the single-ended output signal. And there are bias means for the differential amplifier including circuit means for maintaining the currents through the pair of transistors in constant ratio independently of changes in load at the intermediate gain stage. An inverting gain output stage driven by the intermediate gain stage has an output for driving a load substantially from rail to rail.
In a preferred embodiment the pair of transistors may be connected with common emitters. The input signals may be coupled to the bases of the pair of transistors. The differential-to-single-ended converter may include a first current mirror circuit. The intermediate gain stage may include a first common emitter circuit. The bias means may include a second current mirror circuit; the inverting gain output stage may include a second common emitter circuit. There may be a frequency compensation capacitor circuit connected between the input of the intermediate gain stage and the output of the inverting gain output stage. There may be an operating current circuit for providing an operating bias to the intermediate stage. The output of the intermediate stage may be taken at its emitter. The output of the output stage may be taken at its collector.
The invention also features a high gain amplifier including a transconductance amplifier input stage; a common emitter intermediate gain stage driven by the transconductance amplifier input stage; and a common emitter output gain stage driven by the intermediate gain stage.
In a preferred embodiment the amplifier may include a frequency compensation circuit coupled between the input of the intermediate stage and the output of the output stage for frequency compensating the amplifier for closed loop stability. The frequency compensation circuit may include a single capacitor. The input stage may include a differential amplifier. The differential amplifier may include a pair of transistors. The transistors may be common emitter connected. The input stage may include input circuits connected to the bases of the transistors. The input stage may include a first current mirror. There may be bias means for the differential amplifier. The bias means may include current means for maintaining the currents through the pair of transistors in constant ratio independently of changes in load. The output gain stage may be an inverting stage and it may have its output on its collector. The intermediate stage may have its output at its emitter.